The present invention generally relates to a semiconductor apparatus having a decoupling capacitor.
A conventional semiconductor chip is provided with electrodes connected to inner leads, arranged around a die pad. The die pad, semiconductor chip, bonding wires, and the inner leads are molded by a mold resin, such as an epoxy resin. The semiconductor package includes outer leads, which are extending outwardly from the package.
A motherboard is provided at the inner layer and outer layer with copper wiring patterns. The motherboard is also provided at both upper and lower surfaces with terminals on which semiconductor devices and chips are mounted. A semiconductor device and chips, such as resistances and capacitors, are mounted on the motherboard using solder paste.
The semiconductor package includes a chip capacitor used in order to reduce a power supply/ground noise. The chip capacitor is arranged between conductive patterns to which power supply terminal and ground terminal are connected.
According to such a conventional semiconductor apparatus, the power supply/ground noise inside the semiconductor package cannot be removed sufficiently. As a result, it is hard to reduce electromagnetic radiation noise generated in the semiconductor package. Further, since a conductive route formed between the semiconductor package and the chip capacitor is long, parasitic inductance is increased. And therefore, the chip capacitor does not effectively function to reduce the power supply/ground noise.
Accordingly, an object of the present invention is to provide a semiconductor apparatus in which power-supply/ground noise is sufficiently reduced.
Additional objects, advantages and novel features of the present invention will be set forth in part in the description that follows, and in part will become apparent to those skilled in the art upon examination of the following or may be learned by practice of the invention. The objects and advantages of the invention may be realized and attained by means of the instrumentalities and combinations particularly pointed out in the appended claims.
According to a first aspect of the present invention, a lead frame type of semiconductor apparatus includes a die pad on which a semiconductor chip is mounted; ground terminals which are to be grounded; power supply terminals which are connected to a power supply; inner leads connected to the ground terminals and power supply terminals, in which a pair of adjacent inner leads for power supply terminal and ground terminal are extended inwardly; a chip capacitor mounting pad which is provided at inner ends of the extended inner leads; and a chip capacitor which is mounted on the chip capacitor mounting pad so that a decoupling capacitor is provided.
According to a second aspect of the present invention, a lead frame type of semiconductor apparatus includes a die pad on which a semiconductor chip is mounted; ground terminals which are to be grounded; power supply terminals which are supplied with electrical power, in which each one of the ground terminals and each one of the power supply terminals are arranged to be adjacent each other so that a plurality of pairs of ground/power supply terminals are formed; inner leads connected to the ground terminals and power supply terminals; and high dielectric constant material provided between each pair of the ground/power supply terminals so that a decoupling capacitor is formed therein.
According to a third aspect of the present invention, a lead frame type of semiconductor apparatus includes a die pad which comprises a chip mounting area on which a semiconductor chip is mounted and a ground bonding area, which is extended outwardly from the chip mounting area; ground terminals which are to be grounded; power supply terminals which are supplied with electrical power; inner leads connected to the ground terminals and power supply terminals; and chip capacitors connected between the ground bonding area and inner leads connected to the power supply terminals to form decoupling capacitors.
According to a fourth aspect of the present invention, a lead frame type of semiconductor apparatus includes a die pad on which a semiconductor chip is mounted, in which the die pad is divided into even number of areas to form first and second areas; ground terminals which are to be grounded; power supply terminals which are supplied with electrical power; inner leads connected to the ground terminals and power supply terminals, in which the inner leads connected to the ground terminals are connected to the first area of the die pad and the inner leads connected to the power supply terminals are connected to the second area of the die pad; and chip capacitors connected between the first area and second area of the die pad to form decoupling capacitors.
According to a fifth aspect of the present invention, a lead frame type of semiconductor apparatus includes a die pad which comprises a chip mounting area on which a semiconductor chip is mounted and ground bonding areas, which are formed by extending outwardly the opposite two sides of the die pad; ground terminals which are to be grounded; power supply terminals which are supplied with electrical power; inner leads connected to the ground terminals and power supply terminals; power supply bonding areas which are arranged between the die pad and inner lead and are connected to the inner leads connected to the power supply terminals, wherein the power supply bonding areas are arranged at the opposite two sides of the die pad; and chip capacitors connected between the die pad and the power supply bonding areas to form decoupling capacitors.
According to a sixth aspect of the present invention, a lead frame type of semiconductor apparatus includes a die pad which comprises a chip mounting area on which a semiconductor chip is mounted and a ground bonding area, which are formed by extending outwardly all the sides of the die pad so that the ground bonding area surround the chip mounting area; ground terminals which are to be grounded; power supply terminals which are supplied with electrical power; inner leads connected to the ground terminals and power supply terminals; power supply bonding areas which are arranged between the ground bonding area of the die pad and inner lead and are connected to the inner leads connected to the power supply terminals; and chip capacitors connected between the ground bonding area and the power supply bonding areas to form decoupling capacitors.
According to a seventh aspect of the present invention, a lead frame type of semiconductor apparatus includes a die pad which comprises a chip mounting area on which a semiconductor chip is mounted and a ground bonding area, which are formed by extending outwardly all the sides of the die pad so that the ground bonding area surround the chip mounting area; ground terminals which are to be grounded; power supply terminals which are supplied with electrical power; inner leads connected to the ground terminals and power supply terminals; power supply bonding areas which are arranged between the ground bonding area of the die pad and inner lead and are connected to the inner leads connected to the power supply terminals; and a high dielectric constant material arranged between the ground bonding area and the power supply bonding areas to form decoupling capacitors.
According to an eighth aspect of the present invention, a lead frame type of semiconductor apparatus includes a die pad which comprises a power supply bonding area which is formed by extending outwardly all the sides of the die pad; ground terminals which are to be grounded; power supply terminals which are supplied with electrical power; inner leads connected to the ground terminals and power supply terminals, in which the inner leads connected to the power supply terminals are connected to the power supply bonding area of the die pad; a high dielectric constant layer formed on the die pad; and a metal layer formed between the high dielectric constant layer and die pad to have a chip mounting area on which a semiconductor chip is mounted and a ground bonding area surrounding the chip mounting area.
According to a ninth aspect of the present invention, a semiconductor apparatus includes an organic material substrate; a die pad formed on the organic material substrate, a semiconductor chip being mounted on the die pad; ground terminals which are to be grounded; power supply terminals which are supplied with electrical power; first conductive patterns which are formed on the organic material substrate and are connected to the ground terminals; second conductive patterns which are formed on the organic material substrate and are connected to the power supply terminals, in which adjacent two of the first and second conducive patterns are extended inwardly; chip capacitor mounting pads which are provided at inner ends of the extended first and second conductive patterns; and chip capacitors which are mounted on the chip capacitor mounting pads so that a decoupling capacitor is provided.
According to a tenth aspect of the present invention, a semiconductor apparatus includes an organic material substrate; a die pad formed on the organic material substrate to have a chip mounting area on which a semiconductor chip is mounted and a ground bonding area which is formed by extending outwardly each side of the die pad; ground terminals which are to be grounded; power supply terminals which are supplied with electrical power; first conductive patterns which are formed on the organic material substrate and are connected to the ground terminals; second conductive patterns which are formed on the organic material substrate and are connected to the power supply terminals; and chip capacitors which are arranged between the second conductive patterns and the ground bonding area so that a decoupling capacitor is provided.
According to an eleventh aspect of the present invention, a semiconductor apparatus includes an organic material substrate; a die pad formed on the organic material substrate on which a semiconductor chip is mounted, in which the die pad is divided into even number of areas to form first and second areas; ground terminals which are to be grounded; power supply terminals which are supplied with electrical power; first conductive patterns which are formed on the organic material substrate and are connected to the ground terminals and the first area of the die pad; second conductive patterns which are formed on the organic material substrate and are connected to the power supply terminals and the second area of the die pad; and chip capacitors which are arranged between the first and second areas of the die pad so that a decoupling capacitor is provided.
According to a twelfth aspect of the present invention, a semiconductor apparatus includes an organic material substrate; a die pad which is formed on the organic material substrate and comprises a chip mounting area on which a semiconductor chip is mounted and ground bonding areas, which are formed by extending outwardly the opposite two sides of the die pad; ground terminals which are to be grounded; power supply terminals which are supplied with electrical power; first conductive patterns which are formed on the organic material substrate and are connected to the ground terminals; second conductive patterns which are formed on the organic material substrate and are connected to the power supply terminals; power supply bonding areas which are arranged between the die pad and the first and second conductive patterns and are connected to the first conductive patterns, wherein the power supply bonding areas are arranged at the opposite two sides of the die pad; and chip capacitors which are arranged between the die pad and power supply boding area so that a decoupling capacitor is provided.
According to a thirteenth aspect of the present invention, a semiconductor apparatus includes an organic material substrate; a die pad which is formed on the organic material substrate and comprises a chip mounting area on which a semiconductor chip is mounted and ground bonding areas, which are formed by extending outwardly to surround the chip mounting area; ground terminals which are to be grounded; power supply terminals which are supplied with electrical power; first conductive patterns which are formed on the organic material substrate and are connected to the ground terminals; second conductive patterns which are formed on the organic material substrate and are connected to the power supply terminals; power supply bonding areas which are arranged between the ground bonding area of the die pad and the first and second conductive patterns, the power supply bonding area being connected to the second conductive patterns; and chip capacitors which are arranged between the ground bonding area and power supply bonding area so that a decoupling capacitor is provided.
According to a fourteenth aspect of the present invention, a semiconductor apparatus includes an organic material substrate; a die pad which is formed on the organic material substrate and comprises a chip mounting area on which a semiconductor chip is mounted and ground bonding areas, which are formed by extending outwardly to surround the chip mounting area; ground terminals which are to be grounded; power supply terminals which are supplied with electrical power; first conductive patterns which are formed on the organic material substrate and are connected to the ground terminals; second conductive patterns which are formed on the organic material substrate and are connected to the power supply terminals; power supply bonding areas which are arranged between the ground bonding area of the die pad and the first and second conductive patterns, the power supply bonding area being connected to the second conductive patterns; and a high dielectric constant material arranged between the ground bonding area and the power supply bonding areas to form decoupling capacitors.
According to a fifteenth aspect of the present invention, a semiconductor apparatus includes an organic material substrate; a die pad which comprises a power supply bonding area which is formed by extending outwardly all the sides of the die pad; ground terminals which are to be grounded; power supply terminals which are supplied with electrical power; first conductive patterns which are formed on the organic material substrate and are connected to the ground terminals; second conductive patterns which are formed on the organic material substrate and are connected to the power supply terminals; a high dielectric constant layer formed on the die pad; and a metal layer formed between the high dielectric constant layer and die pad to have a chip mounting area on which a semiconductor chip is mounted and a ground bonding area surrounding the chip mounting area.